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In technology of electronic packaging, demands of miniaturization and high-density in electronic systems has sustainably grown. Therefore, it have been required to develop the technology of three dimensional (3D) stacking using through silicon via (TSV) Technology. The TSV technology is an interconnection method by filling an electric conductive material in via hole after via formation. Cu as a filling...
Joint properties of Au stud bumps joined with Sn-3.5Ag solder by flip chip bonding were investigated. Au stud bumps were bonded on SOP (solder on pad) at bonding temperature of 260°C and 300°C for 10sec, respectively. Aging treatment was carried out at 150°C for 100 and 300 hrs. After flip chip bonding, intermetallic compounds (IMCs) of AuSn, AuSn2, and AuSn4 were formed at interface between Au stud...
Demand for high speed, high density, small size, and multifunctional electronic devices has driven the development of 3D integration. Cu pillar bumps have received great attentions in ultra fine pitch 3D packaging. In this study, Sn-3.5Ag and Sn-58Bi cap bumps were fabricated on Cu pillar for fine pitch bonding of 3D packaging. Sn-Ag and Sn-Bi cap bumps with eutectic composition were fabricated with...
SiC-nanoparticle-mixed Sn58Bi solders were successfully produced by electroplating and the mechanical and microstructural properties of Sn58Bi+SiC solders were observed and analyzed in this study. Dispersed SiC nanoparticles by ultrasonic horn were added into Sn-Bi plating solution. With the SiC added Sn-Bi plating solution, solder bumps were electroplated. After electroplating, the solder bump specimens...
In this paper, the effect of SiC nano-particles in micro-solder bump was investigated. SiC nano-particles were dispersed by using ultrasonic homogenizer in plating solution of eutectic Sn58Bi solder and codeposited in eutectic Sn58Bi solder bumps. Solder bumps were fabricated on patterned wafer. Prepared samples were aged for 100, 256 and 400 hrs at 100??C respectively, and then the observation of...
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