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One of the consequence of the scaling down of latest technologies, is that digital circuits are more prone to be affected by faults caused by physical manufacturing defects, environmental perturbations (e.g., radiations, electromagnetic interference), or aging-related phenomena. Understanding the behavior of the whole system in the presence of faults affecting digital circuits is crucial for designing...
This paper describes the joint effort of the two FP7 EU projects CLERECO and MoRV toward the definition of an extended reliability information exchange format able to manage reliability information for the full system stack, from technology up to the software level. The paper starts from the RIIF language initiative, proposing a set of new features to improve the expression power of the language and...
Developing new methods to evaluate the software reliability in an early design stage of the system can save the design costs and efforts, and will positively impact the product time-to-market. In this paper, we propose a novel fault injection technique to evaluate the reliability of a computing system running a software at early design stage where the hardware architecture is not completely defined...
Developing new methods to evaluate the software reliability in an early design stage of the system can save the design costs and efforts, and will positively impact product time-to-market. This paper introduces a new approach to evaluate, at early design phase, the reliability of a computing system running a software. The approach can be used when the hardware architecture is not completely defined...
One of the major reliability concerns in nano-scale CMOS VLSI design is the time-dependent Bias Temperature Instability (BTI) degradation. Negative Bias Temperature Instability and Positive Bias Temperature Instability (NBTI and PBTI) weaken MOSFETs over usage/stress time. We present an embedded 6T SRAM ring oscillator structure which provides in-situ measurement/characterization capability of cell...
The minimum insulator spacing between the polysilicon control gate (PC) and the diffusion contacts (CA) in advanced VLSI circuits is aggressively shrinking due to continuous technology scaling. Meanwhile, rapid adoptions of new materials such as metal gate, epitaxial SiGe source /drain, stress liner, and copper contact together with new device configurations such as raised source/drain and FinFET...
Urban sensing is emerging as a significant Wireless Sensor Networks (WSNs) application. In such a scenario, static sensors are sparsely deployed in an urban area to collect environmental information. Sensed data are opportunistically collected by Mobile Sinks (MSs), which can be other sensor nodes attached to cars or buses, or carried by people while they move around the city. Since the contacts between...
This paper reports on the fifth International Workshop on Emerging Technologies for Next-generation GRID (ETNGRID), held within the WETICE conference in 2008. The content describes the main topics of the ETNGRID workshop as well as a summary of the main contributions about the papers that each author has presented to the workshop attendees. On each paper, the following comment will highlight the value...
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