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This article presents low power frequency synthesizer with phase to analog converter (PAC) and aperture phase detector (APD) to cut down noise and power and outcome lower reference spur. The proposed frequency synthesizer is build-in wireless power receiver system to meet low power requirement for transmission efficiency optimization. During locked condition, the synthesizer can catch to compare the...
This paper present a low power voltage control oscillator (VCO) and implemented in tsmc 0.18 μm BiCMOS process, which using current-reuse technique to support low power consumption from supply voltage 1.3V. The proposed circuit measured as tuning range of 9.02∼10.46 GHz at power consumption is 2.6 mW. The measured phase noise is −111.2 dBc/Hz at offsets 1 MHz of center frequency 10.27 GHz. The chip...
This article presents a voltage-controlled oscillator (VCO) utilizing transformer coupling method and combining the efficiency of the class-C oscillator to improve the phase noise performance by increasing the negative-conductance (-Gm) of the VCO core and reduce the power consumption. Implemented in 0.18um SiGe BiCMOS process, the proposed VCO operates between 5.27 GHz and 5.56 GHz and matches 802...
This letter proposed a 1.8V phase locked loop (PLL) using frequency expansion technique. By utilizing pulse interpolation, the proposed architecture is capable of suppressing high-order harmonics of the reference spur as well as fundamental spur. In the implementation, a four-stage pulse interpolator achieves 6-dB additional spur suppression. The PLL was fully integrated in 0.18-μm CMOS technology,...
A cross-coupled Colpitts VCO using three-path inductor is proposed. The proposed VCO comprises a p-core cross-coupled VCO stacked on an n-core gm-boosted Colpitts VCO. The three-path inductor with patterned ground shield is used to reduce series resistance caused by skin and proximity effects. The VCO occupies a chip area of 577×813μm2 and was implemented in TSMC 0.18 μm 1P6M CMOS process. The VCO...
This article presents a wide-locking range divide-by-2 quadrature injection-locked frequency divider (QILFD) with capacitive cross-coupled oscillator. The ILFD consists of a quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The proposed CMOS QILFD has been implemented with the TSMC 0.18-μm CMOS technology and...
The proposed a front-end of Bluetooth antenna with filter circuits and a continuous-time quadrature band pass sigma-delta (ΣΔ) modulator integration with CICFF topology are presented for wireless charging application. Continuous-time quadrature band pass sigma-delta (ΣΔ) modulator with Bluetooth link communication in A4WP and control strategy has been adopted in state-of-the-art wireless power transfer...
This paper presents a 1.1V low power Voltage Control Oscillator (VCO) is designed and implemented in a 0.18μmCOMS 1P6M process. The proposed circuits are using adaptive class C technique that can reduce power consumption. At the supply voltage 1.1V, the output frequency is 2.155GHz and the phase noise is −129 dBc/Hz at 1MHz offset. Tuning range is about 155MHz (6.9%) between 2.155 to 2.31GHz while...
This letter proposes a LC-resonance CMOS quadrature voltage controlled oscillator (QVCO) uses in wireless communications and measuring blood glucose applications fabricated in the 0.18 µm UMC CMOS process and describes the circuit design, working principle and measured results of the QVCO. The QVCO circuit is composed of a LC resonance, PMOS cross-coupled, bias resister, and DC block of capacitor...
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