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Future Video Coding (FVC) is a new international video compression standard offering much better compression efficiency than previous video compression standards at the expense of much higher computational complexity. In this paper, an FPGA implementation of FVC 2D transform is proposed. The proposed FVC 2D transform hardware can perform 2D DCT-II, DCT-V, DCT-VIII, DST-I, DST-VII operations for 4×4...
In this paper, a low complexity High Efficiency Video Coding (HEVC) sub-pixel motion estimation (SPME) technique is proposed. The proposed technique reduces the computational complexity of HEVC SPME significantly at the expense of slight quality loss by calculating the sum of absolute difference (SAD) values of sub-pixel search locations using the SAD values of neighboring integer pixel search locations...
In this paper, a novel energy reduction technique for High Efficiency Video Coding (HEVC) Inverse Discrete Cosine Transform (IDCT) and Inverse Discrete Sine Transform (IDST) for all transform unit (TU) sizes is proposed. The proposed technique calculates IDCT and IDST only for DC coefficient if the values of several predetermined forward transformed low frequency coefficients in a TU are smaller than...
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