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A high linearity pulsewidth control loop (PWCL) is proposed in this paper. Using the linear control stage (CS) and digital-controlled charge pump (DCCP), the proposed PWCL can be operated within a wide-range of both input and output duty cycles over a wide frequency range. A simple detection circuit is utilized to control the DCCP in a complementary architecture such that the proposed PWCL can reduce...
In this paper, a high linearity PWCL is proposed. By using the linear control stage and digital-controlled charge pump (DCCP), the proposed PWCL can be operated in wide range of input duty cycle and produced wide range of output duty cycle in wide frequency range. Utilizing simple detect circuit to control DCCP in complementary architecture, the proposed PWCL can reduce lock time ratio to 4.9. The...
An adaptive bandwidth phase-locked loop (PLL) uses a switched-capacitor equivalent resistor circuit in the loop filter and a multistage inverse-linear programmable current mirror to bias of the charge pump for not only the proper loop bandwidth but also constant phase margin and are independent of multiplication factor, reference frequency, output frequency, process, voltage and temperature. The charge...
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