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This paper focuses on the concept of multi-path virtual concatenation as a key enabling technology to support the requirements of spectrum bandwidth of link mapping in the process of virtual network embedding (VNE). A dynamic VNE_MP algorithm for distributed data centers inter-connecting is proposed. Based on the multi-path virtual concatenation mechanisms, a virtual link is split into multiple smaller...
A 2.5D three-dimensional (3D) silicon interposer with through silicon vias (TSV) was designed and fabricated. All structures are for the purpose of evaluating the design and layout, electrical testing, and to evaluate process reliability of the 2.5D interposer. Three levels are tested: chip, interposer and plastic substrate. The paper details the layout of the three levels, the principal electrical...
In this paper, a group of coplanar lines on a silicon dioxide insulating layer on a nominally doped silicon substrate is simulated and measured. Electrical parameters extracted from published data are used and lead to substantially improved agreement with measurements. In addition, several models of redistribution layer (RDL) with different shape-TSVs (through silicon vias) are simulated, along with...
In this paper several heat dissipation mechanisms are studied in an effort to improve heat dissipation of a high-power packaged chip in its environment. Specifically we examine a cavity-down structure consisting of a copper plate in thermal contact with the back side of the chip. In order to evaluate the thermal performance of the cavity-down approach, three structures are compared via simulation...
A switch Application Specific Integrated Circuit (ASIC) chip implemented in six-substrate layers for low cost design which has more than 1000 pin-count. This paper deals with the electrical design of the high density package, including transmission characteristics of the key signal lines, crosstalk between signal lines, the coupling between neighboring power pins, DC IR drop and AC input impedance...
Differential interconnect lines in multi-gigabits system in package (SiP) packaging system are studied in this paper. The performance of interconnect lines can be easily estimated with jitter and eye opening using the eye diagram that is very helpful metric. To maintain good eye-diagram with high voltage swing and low timing jitter, a signal integrity (SI) design flow of SiP is proposed based on eye-diagram...
A series of new chemical amplified copolymer containing nonionic photoacid generator (PAG) p-toluene sulfonyloxymaleimide (TsOMI), film-forming component [N-hexadecylmethacrylamide (HDMA)] and acidolytic deprotection group p(tert-butyloxycarbonyl-oxy) styrene (t-BOCSt) were designed and synthesized. The behavior of copolymer molecular arrangement at air/water interface, patterning properties of copolymer...
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