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In the recent years, many energy-efficient realtime task scheduling algorithms have been proposed for multicore platforms. Most of them focus on independent tasks, however, relatively little work has been done in the presence of task synchronization. In this paper, we are interested in scheduling of real-time tasks which may make requests for accessing shared resources at the run time. A similarity-based...
In order to improve energy efficiency of computation-intensive workloads in Cloud Radio Access Network (C-RAN), virtualized hardware accelerators (HA) are proposed in this paper. In C-RAN architecture, the base stations (BS) are running in the virtual machines. Virtualization mechanism of HA makes each BS feel like owning a HA exclusively, but actually BSs sharing the HAs. To tackle the problem of...
In this paper, we propose a ceiling-based scheduling algorithm, called conditional abortable task scheduling algorithm (CATSA), to schedule real-time tasks with abortable critical sections in a non-ideal dynamic voltage scaling processor. To minimize the energy consumption, the CATSA uses the lowest possible processor speed for task executions such that all the timing constraints of tasks are satisfied...
Constellation networking is the prominent technology for the next generation satellite systems. The communication schedule is a key problem for constellation maintenance. However, the traditional SRS (Satellite Range Scheduling) model do not use inter-satellite links. In this paper, a communication scheduling model is proposed, in which the ISLs (Inter Satellite Links) is built. And the NP complicity...
In our previous works, based on characteristics of emergency systems such as quick response to emergencies, a polynomial time algorithm was proposed to solve task schedulable problem. However, the above mentioned task scheduling method did not consider importance and urgency differences among tasks in selecting task to accomplish. In order to make the task scheduling be more close to actual process...
This paper presents a real-time H.264/AVC baseline profile video encoder. The encoder hardware is implemented using a cost-effective, low-power ADI Blackin-561 DSP and related peripherals for real-time video capturing, coding and streaming. The encoder software is developed using a two-stage pipelining framework for efficient parallel video data encoding. A synchronization mechanism with shared memory...
With the continuing increase in density of VLSI, limited buffer can be placed inside the crossbar and this combined input-crosspoint-queued (CICQ) switch structure decouples the inputs and outputs matching. In this paper, an analysis of the performance of Round-Robin scheduling algorithm for CICQ switch has been made proves that the Round-Robin algorithm can achieve 100% throughput under uniform traffic...
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