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We proposed a fine-metal gated graphene optical modulator on a CMOS compatible silicon photonic platform. A maximum extinction ratio of 1.2dB is realized by using a 25-nm thick Al2O3 gate capacitor. Optimized device structure and initial Fermi energy dependences are discussed.
We report the world's smallest field effect transistors (FETs) with channel lengths of 32 nm including c-axis aligned crystalline (CAAC) In-Ga-Zn-O as their active layers, which achieve low off-state leakage currents. Furthermore, these FETs exhibit excellent subthreshold swing values despite having thick gate insulating film. The FET operation has been achieved owing to the 3D gate structure with...
We report novel FETs with a structure in which not only the top surface but also the side surfaces of island-shaped c-axis aligned crystalline indium-gallium-zinc oxide (CAAC-IGZO) serving as a channel are surrounded by a gate electrode, that is, surrounded channel CAAC-IGZO FETs. The FETs maintained their favorable subthreshold characteristics even if the channel length was scaled down to approximately...
Fuji Electric developed a 1200V class RC-IGBT based on our latest thin wafer process. The performance of this RC-IGBT shows the same relationship between conduction loss and switching loss as our 6th generation conventional IGBT and FWD. In addition its trade-off can be optimized for hard switching by lifetime killer. Calculations of the hard switching inverter loss and chip junction temperature (Tj)...
Defects in the modern LSIs manufactured by the deep-submicron technologies are known to cause complex faulty phenomena. Testing by targeting only stuck-at or bridging faults is no longer sufficient. Yet, increasing defect coverage is even more important. A stuck-open fault model considers transistor level defects, many of which are not covered by a stuck-at fault model. Further, test vectors for stuck-open...
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