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The lack of lightning strike protection (LSP) for the nanocomposite materials limits their use in many applications including aircrafts. As a result, there is a continuous interest in understanding the heterogeneous thermoelectric behavior of mixtures with carbon fibers/nanotubes of these materials. Currently available methodologies, including computer simulation of finite different method (FDM) with...
In this paper, we study the resilience of supply networks against disruptions and provide insights to supply chain managers on how to construct a resilient supply network from the perspective of complex network topologies. Our goal is to study how different network topologies, which are created from different growth models, affect the network's resilience against both random and targeted disruptions...
In this paper, we present a novel Expectation Maximization (EM) algorithm for automatic color image inpainting using a new discrete multi scale directional sparse representation called the Discrete Shearlet Transform (DST). It is now acknowledged that the traditional wavelets are not very effective when dealing the multi dimensional signals having distributed discontinuities such as edges. To achieve...
The paper presents the modeling of subsea coaxial cable as a FIR filter on Matlab. The subsea coaxial cables are commonly used in telecommunication industry and, oil and gas industry. Furthermore, this cable is unlike a filter circuit, which is a "lumped network" as individual components appear as discrete items. Therefore, a subsea coaxial network can be represented as a digital filter...
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute significantly to the statistical aspect of contemporary hardware designs. Therefore, the performance metrics of such designs are also statistical in nature. In previous work, we have employed probabilistic model checking to rigorously evaluate the statistical performance of hardware...
With the arrival of the CMOS technology, the sizes of the transistors are anything but increasing. Due to the current transistor sizes single event upsets, which were over looked for the previous generation are not so anymore. With memories and other peripherals well protected from single event upsets, processors are in a critical state. Hard errors too have a higher probability of occurrence. This...
Analog circuit sizing is the task to determine the sizes of all components in the circuit during automated synthesis. Randomized combinatorial optimization algorithms are desired for quicker determination of a set of optimal sizes of the components. These algorithms require set of multiple performance parameters, for a very large number of sized circuits. Therefore the reduction in time required to...
The world of computing has recently seen rapid transitions from uni-core processors to multi-core processors. Tools for learning, such as processor simulators also need to make a transition to this new paradigm of computing. A simulator needs to incorporate support not only for the latest processors but also for early generation processors. This enables the task of learning and adapting to the new...
Analytical models of IEEE 802.11-based WLANs are invariably based on approximations, such as the well-known mean-field approximations proposed by Bianchi for saturated nodes. In this paper, we provide a new approach for modeling the situation when the nodes are not saturated. We study a State Dependent Attempt Rate (SDAR) approximation to model M queues (one queue per node) served by the CSMA/CA protocol...
Fault simulation is one of the elemental steps in test pattern generation and is widely used for digital circuits. In case of analog circuits, fault simulation is not generally adopted because of the lack of suitable fault models and the time required for the transistor level simulation of the entire circuit. In this paper, a macromodel level fault model, which is able to represent the faulty behavior...
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