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A new design on mixed-voltage I/O buffers with slew-rate control but without gate-oxide reliability problem in low-voltage CMOS process is proposed. The proposed circuit can effectively reduce the ground bounce effects without suffering gate-oxide reliability problems and hot-carrier degradation issues. The proposed mixed-voltage I/O buffer with slew-rate control has been designed in a 0.18-mum CMOS...
A new circuit design for mixed-voltage I/O buffers to prevent hot-carrier degradation is proposed. The mixed-voltage (2timesVDD tolerant) I/O buffer is designed with hot-carrier-prevented circuits in a 0.18-mum CMOS process to receive 3.3-V (2timesVDD tolerant) input signals without suffering gate-oxide reliability, circuit leakage issues, and hot-carrier degradation. In the experimental chip, the...
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