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The single analog filter (SAF) hybrid filter bank (HFB) ADC is presented in this paper. Base on SAF architecture, a calibration model is derived to integrate the analog filter's realization errors and channel mismatches errors. A two-channel SAF HFB ADC with 12-bit resolution and 200MHz sampling rate is implemented. The experimental results show that the average spurious-free dynamic range (SFDR)...
This paper studies the error of the hybrid filter banks (HFB) due to analog realization errors. It is shown that the architecture of HFB is much more sensitive to even small analog imperfections. Therefore, the performance of HFB has a dramatic deterioration. In order to improve the performance, a method named central frequency is presented. The results show that the value of max aliasing function...
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