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This work presents a gate/source-overlapped HTFET (SO-HTFET) with Gaussian IDS-VGS, utilized as a single transistor distance computing cell (DCC) for associative processing (AP). With much simplified DCC, inter-cell coupling, and peripherals, SO-HTFET-based AP shows 250∗ lower power, much higher cell density, and performance than digital CMOS-based Boolean AP.
As an apt choice for long-term analog memory in standard CMOS processes, floating-gate transistors are key enablers for large-scale programmable analog systems. Such systems are often designed for battery-powered—and generally resource-constrained—applications, which require the memory cells to program quickly with low infrastructural overhead. In order to meet these needs, we present a new analog...
New innovative electronics applications require larger memory capacity with decreasing memory array size. In this way, architectures implementing multi-bits or multi-level operations draw much attention because they proved to be one of the ways to reach this goal. In this paper, a Three Bits Cell concept, allowing 3 bits functionality, is investigated. This solution is obtained with multi-bits and...
The reliability of advanced embedded non-volatile memories has been discussed using the 2T-FNFN devices example. The write/erase endurance and the data retention are the most important reliability parameters. The intrinsic reliability mechanisms can be addressed through single cell evaluation, while the cell-to-cell variation determines the product level reliability. The cell-to-cell variation can...
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