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Coss nonlinear behavior of modern power FETs challenges large-signal model development used for DC-DC converter efficiency optimization. Small-signal data available in vendor's specifications could mislead and cause errors. Paper reviews existing modeling approaches and suggests accurate practical large signal Coss models for popular wide bandgap (WBG) FETs based on experimental test setup.
High efficiency and power density conversion requires minimizing switching losses associated with power FET Coss recharging. Experiments show significant differences between small-signal based Coss data provided in datasheets versus large signal switching behavior of FETs for new Si super-junction, SiC and GaN technologies. Thus, better accuracy Coss models for switching losses are suggested and new...
Paper analyzes substantial Coss behavior differences of FETs using super-junction Si, SiC and GaN technologies versus traditional Si process and suggests new practical models for power losses optimization. These models applied to derive normalized ZVS conditions and boundaries for popular PWM ZVS topologies allowing efficiency optimization at wide operating conditions.
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