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Chip Multiprocessors (CMPs) and Non-Uniform Cache Architectures (NUCAs) represent two emerging trends in computer architecture. Targeting future CMP based systems with NUCA type L2 caches, this paper proposes a novel data migration algorithm for parallel applications and evaluates it. The goal of this migration scheme is to determine a suitable location for each data block within a large L2 space...
In this paper, we (i) quantify the impact of compiler-directed I/O prefetching on shared caches at I/O nodes. The experimental data collected shows that while I/O prefetching brings some benefits, its effectiveness reduces significantly as the number of clients (compute nodes) is increased; (ii) identify inter-client misses due to harmful I/O prefetches as one of the main sources for this reduction...
Software related issues such as code/data mapping, highlevel communication management and power control are becoming increasingly important as we move towards NoC(network-on-chip) based CMPs (chip multiprocessors). This paper presents an ILP (integer linear programming) based formulation of the problem of communication energy minimization in such architectures. This formulation can be used for selecting...
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