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Multi-bit vertical structure NAND (VsNAND) flash memories with 32-paired FinFET cell string have been successfully integrated for the first time. Its array integration issues regarding the sub-10 nm vertical structure fin could be solved by proper choices of isolation material, ion implantation, and word line patterning. VsNAND flash array cells with TANOS (TaN/Al2O3/SiN/SiOx/Si) charge trap structure...
A new type of memory, paired FinFET charge trap memory is reported. It consists of two split silicon fins and insulator between them. Two channels are formed on the outer surface of silicon so doubled integration density can be achieved. We successfully fabricated paired FinFET SONOS devices. It shows good program and erase characteristics. Independent programming on each storage nodes is demonstrated...
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