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A high-speed analog VLSI image acquisition and pre-processing system has been designed and fabricated in a 0.35 ??m standard CMOS process. The chip features a massively parallel architecture enabling the computation of programmable low-level image processing in each pixel. Extraction of spatial gradients and convolutions such as Sobel or Laplacian filters are implemented on the circuit. For this purpose,...
A high speed Analog VLSI Image acquisition and pre-processing system is described in this paper. A 64times64 pixel retina is used to extract the magnitude and direction of spatial gradients from images. So, the sensor implements some low-level image processing in a massively parallel strategy in each pixel of the sensor. Spatial gradients, various convolutions as Sobel Alter or Laplacian are described...
High-speed video cameras are powerful tools for investigating for instance the biomechanics analysis or the movements of mechanical parts in manufacturing processes. In the past years, the use of CMOS sensors instead of CCDs has made possible the development of high-speed video cameras offering digital outputs, readout flexibility and lower manufacturing costs. In this paper, we proposed a high-speed...
A high speed VLSI image sensor including some preprocessing algorithms is described in this paper. The sensor implements some low-level image processing in a massively parallel strategy in each pixel of the sensor. Spatial gradients, various convolutions as Sobel or Laplacian operators are described and implemented on the circuit. Each pixel includes a photodiode, an amplifier, two storage capacitors...
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