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Scaling of technology has a severe impact on the reliability of semiconductor devices. Negative bias temperature instability (NBTI) is a dominant factor in reliability degradation in nano‐scale technology. It is an aging phenomenon, which degrades the p‐channel metal oxide semiconductor (PMOS) transistors over time. A large area of the system on chip is covered by static random access memory (SRAM)...
In this paper, a loop based coplanar random access memory (RAM) cell with set/reset ability using quantum‐dot cellular automata (QCA) technology is first proposed. The operation of the RAM cell is validated physically as well as by simulations using QCADesigner tool. The energy dissipation analysis of the proposed RAM cell demonstrates that the proposed design dissipates very low energy. Additionally,...
Altering the performance of single transistors and integrated circuits at nominal operating conditions over time, as well as soft errors, are serious reliability issues for integrated CMOS circuits, especially when used in space applications. In principle, the effect of soft errors becomes even more critical if the circuit performance degrades over time. To address this detrimental behavior, the impact...
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