The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
An integrated circuit of radio-frequency power detection by a 0.18ĭm CMOS process with the output voltage linearly proportional to the input power in decibel is presented. The target dynamic range of this radio-frequency power detector design is 40 dB with the log-error being within ±1dB. Whatever the point of view is on dynamic range or logarithmic error, the working range is from DC to 8GHz. The...
In this paper, a design for high dynamic range applicable of power detector by using successive detection logarithmic amplifier (SDLA) configuration consists of PMOS load limiting amplifier and unbalanced source-coupled pairs. This device was been fabricated by TSMC 0.18-??m 1P6M CMOS process. The experimental results show that the dynamic range of the power detector the frequency 900-MHz is almost...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.