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In this paper, a design for high dynamic range applicable of power detector by using successive detection logarithmic amplifier (SDLA) configuration consists of PMOS load limiting amplifier and unbalanced source-coupled pairs. This device was been fabricated by TSMC 0.18-??m 1P6M CMOS process. The experimental results show that the dynamic range of the power detector the frequency 900-MHz is almost...
A quad-band GSM/GPRS power amplifier module is designed with a built-in ability of RF power transmitting control. Within the RF power transmitting control loop, a RF power detecting circuit with another reference circuit are embedded together onto the same InGaP/GaAs HBT power amplifier chip to achieve a good temperature compensation. Such power chips are then assembly with a silicon CMOS comparative...
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