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The matrix-matrix multiplication is an essential building block that can be found in various scientific and engineering applications. High-performance implementations of the matrix-matrix multiplication on state-of-the-art processors may be of great importance for both the vendors and the users. In this paper, we present a detailed methodology of implementing and optimizing the double-precision general...
A better routing scheme becomes more significant with the quantum key distribution network developing. This paper makes use of pre-relay, parallel work and shortest path first strategy and proposes a hierarchical routing scheme with the perspective of parallel processing on wide-area quantum key distribution network based on trusted relay. Then the paper proposes the hierarchical routing algorithm...
There is an urgent demand in studying efficient methodologies to enable hybrid multi- and many-core accelerations in global climate simulations. The Model for Prediction Across Scales (MPAS) is a family of earth-system component models that receives increasingly more attention. Like many other models, MPAS, though features some emerging numerical algorithms, employs a pure MPI approach for parallel...
One of the emerging computational approaches in nuclear physics is the configuration interaction (CI) method for solving the many-body nuclear Hamiltonian in a sufficiently large single-particle basis space to obtain exact answers — either directly or by extrapolation. One particular goal is to compute a number of lowest eigenvalues and eigenvectors of the Hamiltonian Ĥ that are associated with a...
Morphosys is a reconfigurable single instruction multiple data (SIMD) architecture mainly composing of host core processor, reconfigurable cells array, frame buffer, context memory and direct memory access (DMA) module. As a common SIMD-based coarse-grained reconfigurable architecture, each context configuration and operation is based on the whole row or column function, which may be inefficient in...
In this paper, we present a C-to-DFG generation algorithm for coarse-grained reconfigurable processor in multimedia application field. The algorithm exploits the operation parallelism available in the sequential code; maximizes parallelism by loop unrolling and scalar replacement. Loop unrolling increases the size of basic block and fully exposes the intrinsic data parallelism. Scalar replacement...
Multiple-reference-frame, quarter-pixel accuracy, and variable-block-size motion estimation (VBSME) employed in H.264/AVC is one of the major contributors to its outstanding compression efficiency and video quality. However, due to its high computational complexity, VBSME needs acceleration for real-time application. We propose a high throughput hardware architecture for H.264/AVC fractional motion...
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