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This paper proposes a test path selection approach for capturing delay failures caused by the accumulated distributed small delay variations. First, a universal path candidate set , which contains testable long paths, is generated. Second, given a path number threshold, path selection from is performed with the objective of maximizing the capability to capture potential delay failures. The path...
Statistical timing models have been proposed to describe delay variations in very deep sub-micron process technologies, which have increasingly significant influence on circuit performance. Under a statistical timing model, testing of a path can detect potential delay failures caused by different small delay defects. Due to path correlations, the potential delay failures captured by two different...
Critical path selection plays an important role in testing of small delay defects (SDD). For some timing-balanced circuits, the numbers of candidate critical paths may be very large, and this will make Monte Carlo simulation based statistical timing analysis very inefficient. A fast path selection approach based on graph partition is proposed in this paper. First, a critical path graph (CPG) is generated...
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