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This paper proposes a fully-integrated 860-GHz terahertz wave sensor. The sensor integrates a terahertz detector and readout circuit in 180-nm standard CMOS process. The readout circuit consists of a low-noise instrumentation amplifier and a high-resolution AZ-ADC. Transmissive imaging without source modulation (no lock-in technique required) is realized using the sensor. The detector consists of...
A novel instrumentation amplifier (IA) is presented in this article. The proposed IA possesses improved performance in comparison with the common current conveyor-based IAs. It consists of two differential voltage current conveyors (DVCCs) and two resistors. The non-ideal effects of the active devices are discussed. Performances of the proposed circuit are confirmed through HSPICE simulation. The...
The nc-Si nonvolatile memory devices with high performance have been fabricated by using general CMOS techniques. High resolution transmission electronic microscope (HRTEM) shows that the average size of nc-Si is 8 nm and its density is 3×1011/cm2. The performance of programming/ erasing and retention time is mainly depending on the quality and thickness of tunnel layer and control layer. The results...
A Mobile UHF RFID Reader made up of RF frontend, phase lock loop, analog baseband and digital baseband is designed and implemented in a 0.18 um CMOS process. A RX configuration without LNA is adopted in this design for high linearity purpose. The 1 dB input compression point is over 2 dBm and input return loss is better than -10 dB from 840 MHz to 930 MHz. A novel servo loop based DC offset cancellation...
A new CMOS current reference solution is presented, by creating a new negative temperature coefficient (TC) current resulted from negative-TC voltage which is generated in the bandgap circuit whose zero-TC (ZTC) point is specially selected, and proposing low line regulation mechanism which is realized by compensating variations of source-to-gate voltage and threshold voltage versus supply voltages...
Based on conventional two-step ADC principle, an 8-bit 250MSPS modified two-step ADC is proposed to reduce power dissipation. It is realized by applying triple-stage comparison for the number reduction of comparators, substituting new reference region selecting logic (RRSL) blocks for sub-DACs and adding sample/hold (S/H) circuit to replace residue amplifier. Simulated with SMIC O.35 mum/3.3 V AMS...
A second generation ITRI micro gyroscope design is designed, fabricated, and tested. Major improvements over the original design include using thin film metallization techniques to increase the proof mass to 9.32 times 10-7g for the 500 times 500 mum2 gyro structure, and demonstrating an integrated package with a CMOS ASIC die. The custom-built, capacitance-to-voltage converter ASIC has a calculated...
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