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A monolithic pixel detector with 0.2μm silicon-on-insulator (SOI) CMOS technology has been developed. It has both a thick high-resistivity sensor layer and thin LSI circuit layer on a single chip. Integration-type and counting-type pixel detectors are fabricated and tested with light and X-rays. The process is open to many researchers through Multi Project Wafer (MPW) runs operated by KEK. Further...
This paper reports on a SOI detector with drift field induced by the flow of majority carriers. It is proposed as an alternative method of detector biasing compared to standard depletion. N-drift rings in n-substrate are used at the front side of the detector to provide charge collecting field in depth as well as to improve the lateral charge collection. The concept was verified on a 2.5 ×2.5mm2 large...
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