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With the introductions of the development and further applications of SDN network, this paper describes a new architecture based on the OpenFlow protocol which is consist of four virtual levels: the application layer, the virtual platform, the control layer and the physical layer. And by studying the features of SDN and the OpenFlow protocol, it makes a theoretical foundation and an effective solution...
Reliability has emerged as an important design criterion due to shrinking device dimensions. Several reliability estimation techniques have been proposed which apply either fault injection or analytical methods. Among all such techniques, design diversity, which is initially proposed to protect system from common-mode failures using redundant copies of different implementation, has been applied to...
Along with the inclusion of GPU cores within the same CPU die, the performance of Intel's processor-graphics has been significantly improved over earlier generation of integrated graphics. The need to efficiently harness the computational power of the GPU in the same CPU die is more than ever. This paper presents a highly optimized Haar-based face detector which efficiently exploits both CPU and GPU...
Reconfigurable architecture is considered as very efficient, attack resistant and suitable for cryptograph applications. But the low utilize ratio of on-chip resources and lack of software programmability of traditional reconfigurable arrays draws the advantages back. In this paper, we proposed a reconfigurable SoC with a programmable dataflow structure which consists of multiple configurable pipelines...
Network is an inevitable trend in the development of Geographic Information System (GIS). Silverlight, as a cross-browser, cross-platform plug-in, can bring the next generation based. NET-media experiences and rich interactive applications for the network, and provides new method of performance for the new generation of WebGIS development. With the research of Silverlight and REST technology, this...
In this paper, a screen printing embedded PDF parser was designed and implemented. Also, hardware accelerator for the graphics rendering engine which are time-consuming most in the whole parsing process was worked out. Many experiments on embedded PDF parser and the frameworks based on hybrid multi-core processors had been conducted to verify system designs and compare performances. The experimental...
In this paper, our work is to frame multi-core processors systems which complete parsing PDF, and in order to parse quickly, we also design hardware accelerator for the graphics rendering engine which are time-consuming most. The final implementation of the system has been tested using a Xilinx University Program Virtex-II Pro Development Board, which features a Virtex-II Pro XC2VP30 Speed Grade -7...
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