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The electrical properties of LPCVD silicon are shown to be optimised for microelectronic applications by depositing the films as an amorphous layer and annealing to yield a polycrystalline form. The film resistivity is lowered and the piezoresistive coefficient raised by this technique. These improvements are explained by a simple theory which incorporates trap density and grain size effects and also...
A theoretical model for piezoresistance in polysilicon is described. Grain size, orientation and doping dependence effects are included. Predictions of gauge factor using the model give reasonable agreement with experimental results and enable optimum processing parameters to be chosen for a given grain size.
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