The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A digital calibration scheme is proposed to minimize the timing mismatch in time-interleaved analog-to-digital converters (TIADCs). First, the scheme is to subtract the outputs from adjacent channel ADCs and to utilize the expectations of the absolute value of the subtracted results to represent the actual sampling time interval. The timing mismatch is recognized by comparing these expectations. The...
This paper presents a design of a four phase 25% duty cycle of 400MHz DLL with calibration. To avoid the disadvantages of digital calibration method, it introduced an all-analog calibration method. Instead of DAC, CP is used in calibration loop to save power consumption and area occupying. With a 4 channel time-interleaved 6 bit flash ADC, the simulated results show that SNR is 30.8dB and 43.6dB with...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.