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Motion compensation is the most critical part for the performance of H.264 decoder. Through fully analysis of the interpolation algorithm, a symmetry characteristic in the algorithm has drawn our attention. Based on a precise deduction, a new VLSI architecture for motion compensation lum interpolation is presented in this paper. This architecture is based on separated 1-D approach and reuses the horizontal...
A novel VLSI architecture for digital multimedia post-processing system is presented. First, the sequence of the post-processing de-blocking filter is modified, and the filter algorithm is optimized. Second, the frames are extended at the upper and left frame boundaries for 8 pixels in depth in order to avoid the irregularity and simplify the control unit. At last a macro block-based together with...
As EDA industry advances to smaller and smaller technology nodes, a tighter link between VLSI circuit manufacturing and physical design is becoming a necessity. This paper introduces several design for manufacturability (DFM) related problems such as critical area reduction, redundant via insertion, chemical-mechanical polishing (CMP), etc. Then the corresponding DFM-aware routing problems are formulated...
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