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This work is concerned with the design and characterization of deep N-well (DNW) monolithic active pixel sensors (MAPS) fabricated in a vertical integration (3D) CMOS technology. These devices come as an evolution of DNW MAPS fabricated in a planar (2D) CMOS process, whose resolution, detection efficiency and charge collection efficiency are expected to improve as a result of the increased functional...
This work is concerned with the design of time invariant analog circuits for processing the signals from deep N-well monolithic CMOS sensors. As compared to the three-transistor front-end typically used in imaging applications, the schemes proposed here, which were conceived to be included in a binary readout channel, lend themselves to pixel-level sparsified readout and are expected to be capable...
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