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In this paper, a new methodology for the automated design of one-bit internal quantizer SigmaDelta-modulators is presented. The core of the method is an NTF prototype generation in the DT-domain based on the quasilinear quantizer modeling, that maximizes the maximum stable amplitude (MSA) of the modulator while achieving a certain minimum peak SNDR. For CT-modulator's, this is followed by a DT-CT...
Timing errors due to clock jitter are one of the most severe problems, when building continuous time (CT) SigmaDelta modulators. This is due to a strong dependence of the modulator resolution on the timing errors of the clock. The methodology presented in this paper allows the implementation of jitter insensitive CT EA modulators. Therefore a modified switched capacitor feedback structure has been...
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