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Digital-controlled switching mode power supplies (SMPS) are popular in the fields of relatively large power supply system. The digital controller is consisted of DSPs or microprocessors performing with software. By contrast, such as on-board SMPSs, adapting digital controller isn't still popular because of its cost or response characteristics even if the controllers are constructed by FPGA or custom...
An 87.7 mm2 1.6 GB/s 128 Mb chain FeRAM with 130 nm 4-metal CMOS process is demonstrated. In addition to small bitline capacitance inherent to chain FeRAM architecture, three new FeRAM scaling techniques - octal bitline architecture, small parasitic capacitance sensing scheme, and dual metal plateline scheme - reduce bitline capacitance from 100 fF to 60 fF. As a result, a cell signal of ??220 mV...
An application that takes advantage of FeRAM characteristics is replacing current DRAM, which then becomes high-performance nonvolatile RAM cache. This improves system performance for many kinds of computer systems, including mobile PCs, cellular phones, digital video products, and storage systems such as SSDs. However, the highest capacity in nonvolatile RAMs that allow frequent cache reads and writes...
Novel cell technologies are successfully developed for the world's highest-density and highest-speed 128 Mb chain FeRAMtrade with SDRAM-compatible 1.6 GByte/s DDR2 interface. To overcome the signal window reduction due to the capacitor shrinkage, new cell technologies such as half-pitch layout with triangular capacitors, advanced nestled chain structure, high-density cover film and low-damage etching...
Wide area ubiquitous networks should have the capability to handle more than 10,000 wireless terminals in a large wireless cell with the radius of several kilometers. However, the functions of wireless terminal are severely limited due to low power consumption and low cost requirements. Therefore, there is a need for a sophisticated wireless access system that employs smart wireless signal processing...
A 125 MHz 1 GIPS at 1.3 V 1 W microprocessor with single-chip tightly-coupled multiprocessor architecture and low-voltage circuits is targeted to high-performance and low-power embedded systems, especially smart information terminals. This paper shows an entire chip diagram integrating four tightly-coupled processors. Each processing element (PE) is in-order two-way issue superscalar with two ALU...
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