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Chip manufacturers provide the Thermal Design Power (TDP) for a specific chip. The cooling solution is designed to dissipate this power level. But because TDP is not necessarily the maximum power that can be applied, chips are operated with Dynamic Thermal Management (DTM) techniques. To avoid excessive triggers of DTM, usually, system designers also use TDP as power constraint. However, using a single...
This invited paper summarizes two new steps towards dealing with dark silicon issues: Thermal Safe Power (TSP) and MatEx (both available as open-source tools at http://ces.itec.kit.edu/download). TSP is a novel thermal-aware power budgeting technique, which is namely an abstraction that provides safe power constraints as a function of the number of active cores. TSP conceptually and radically changes...
Chip manufacturers provide the Thermal Design Power (TDP) for a specific chip. The cooling solution is designed to dissipate this power level. But because TDP is not necessarily the maximum power that can be applied, chips are operated with Dynamic Thermal Management (DTM) techniques. To avoid excessive triggers of DTM, usually, system designers also use TDP as power constraint. However, using a single...
Many cyber-physical systems consist of a collection of control loops implemented on multiple electronic control units (ECUs) communicating via buses such as FlexRay. Such buses support hybrid communication protocols consisting of a mix of time- and event-triggered slots. The time-triggered slots may be perfectly synchronized to the ECUs and hence result in zero communication delay, while the event-triggered...
As the power density of modern electronic circuits increases dramatically, systems are prone to overheating. High temperatures not only raise packaging costs, degrade system performance, and increase leakage power consumption, but also reduce the system reliability. Due to many limits in single core design including the performance and the power density, the microprocessor industry has switched their...
Leakage power consumption contributes significantly to the overall power dissipation for systems that are manufactured in advanced deep sub-micron technology. Different from many previous results, this paper explores leakage-aware energy-efficient scheduling if leakage power consumption depends on temperature. We propose a pattern-based approach which divides a given time horizon into several time...
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