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1T1R-architecture devices were fabricated by integrating ZrO2 based crossbar structure ReRAM onto a foundry-built MOSFET platform. Multilevel operation was realized by using the current limit of a selected cell transistor in the set process. The current level was determined by the transistor's gate voltage, resulting in the control of electrical resistance of the filamentary conductive paths in the...
With the chip multi-processor (CMP) being more and more widespread used in the laptop, desktop and data center area, the power-performance scheduling issues are becoming challenges to the researchers. In this paper, we propose a multi-objective fuzzy genetic algorithm to optimize the energy saving scheduling tasks on heterogeneous CMP system. According to the characteristic of heterogeneous CMP system,...
This paper proposed a novel predictive PI algorithm based on connotative type grey model. The predicted instantaneous queue errors, while not the sample values, are utilized to determine to packet drop rate in the router. This method aims to achieve the satisfactory trade-off between fast responsiveness and low overshoot. Simulation results demonstrate the effectiveness of the grey predictive PI active...
In this letter, we question the superiority of current RED, PI and REM active queue management algorithms by proposing an improved droptail gateway. This improved drop tail adopts random packet drop to avoid global synchronization and deadlock of traffic flows; it also try to keep the instantaneous queue size around the predefined value. The simulation results manifest that this improved drop tail...
There are two important factors in the power-performance issues of chip multi-processor(CMP) system: the execution time of tasks and the system energy consumption. Most of exist energy saving methods are not designed to reduce the system energy while cut the execution time down. This paper represents a multi-objective hybrid genetic algorithm (MHGA) which can make the execution time of tasks minimize...
Real-time embedded systems need reducing power consumption while still maintaining high performance. Dynamic power management (DPM) and dynamic voltage scaling (DVS) are effective control techniques to reduce the energy consumption. We present a real-time energy saving scheduling (RESS) algorithm using DPM and DVS to reduce the energy cost for chip multiprocessor (CMP) systems. The simulating experiment...
In this work, we present a methodology for calculating mobility of nano-scaled MOSFET's from the Boltzmann transport equation (BTE). Approximate solution of the BTE for electrons in nano-scaled MOSFET's is given, and the improved distribution function of the carriers is used to model the mobility of carriers. A new model is presented for two-dimensional characteristic field-dependent mobility. Comparing...
In this work, we present a methodology for calculating mobility of nano-scaled MOSFET's from the Boltzmann transport equation (BTE). Approximate solution of the BTE for electrons in nano-scaled MOSFET's is given, and the improved distribution function of the carriers is used to model the mobility of carriers. A new model is presented for two-dimensional characteristic field-dependent mobility. Comparing...
Based on the improved approximation of modified triangular potential well, a physical-based model of MOSFETs threshold voltage as well as its analytical formulation, considering quantum effects in strong inversion layer, is presented. The new model accounts for quantum effects for future generation MOS devices and integration circuits. The calculated results of the improved model obtained from this...
A novel polysilicon gate quantum effect model for MOSFET devices is presented. Only two fitting parameters are required to account for the polysilicon gate quantum effects. It is shown that neglecting the polysilicon gate quantum effects for nanoscale MOSFETs may lead to a lager error in gate capacitance. Comparing with the Medici simulated results validates the model
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