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Current embedded systems offer enough performance to integrate on a single chip jobs that required several distributed devices in the past. The execution environment of such an integrated architecture should satisfy key requirements, such as, temporal predictability, fault containment or flexibility. In this paper we present these requirements and argue about the suitability of embedded hypervisors...
A higher level of abstraction is required in the design of Multi-Processor Systems-on-a-Chip (MPSoCs) as complexity increases due to the integration of more and more applications on a single chip. This paper introduces a model-based development process, in which a precise specification of the interfaces between IP cores serves as the foundation for an independent development and a seamless system...
The composition of a large SoC out of pre-validated IP-cores requires an architecture that enables the seamless integration of components, i.e. composability. In this paper we present the five principles of composability that must be supported by any architecture that claims to enable the constructive composition of components. After the introduction of the TTSoC architecture and a description of...
The time-triggered system-on-a-chip (TTSoC) architecture enables the realization of mixed-criticality systems using SoCs. The integration of subsystems with different criticality enables massive cost reduction by reducing the overall number of devices and networks (e.g., ECUs in car). To accomplish this goal, the TTSoC architecture offers inherent fault isolation mechanisms that prevent any unintended...
The problem of naming has been extensively studied in the field of distributed systems. However, multi-processor system-on-a-chips (MPSoCs), which are becoming more and more important in the construction of complex embedded systems, exhibit unique challenges with respect to naming. These challenges are induced by the need for dynamic resource management, independent development of IP cores and application...
There are many economic and technical arguments for the reduction of the number of Electronic Control Units (EC Us) aboard a car. One of the key obstacles to achieve this goal is the limited composability, fault isolation and error containment of today's single- processor architectures. However, significant changes in the chip architecture are taking place in order to manage the synchronization, energy...
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