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In this paper, we propose a Nano-pillar HIT solar cell by using different etching methods. First, we use silvaco TCAD Atlas to simulate and discuss the structure. According to simulation results, we obtain a 25.58% conversion efficiency Nano-pillar HIT solar cell which is better than the conventional HIT solar cell (24.7%) [1]. All of the parameters are the same, which is calibrated form [1]. The...
In this paper, a non-classical body-tied vertical field-effect transistor (BTVFET) utilizing the self-aligned technique is presented and demonstrated. Based on the simulations, we find out that the electrical characteristics of the BTVFET are better than that of the conventional SOI VFET, including the outstanding ability of heat dissipation, higher channel mobility, lower parasitic capacitance, and...
In this paper, for the first time, a novel devise-architecture namely multi-source/drain SOI MOSFET is proposed and compared with a conventional SOI MOSFET. According to the simulation result, our proposed transistor not only maintains the desirable short channel behaviour, but also enhances the on/off current ratio due to the multi-source/drain scheme.
A non-classical device structure namely self-aligned quasi-silicon-on-insulator (SOI) metal-oxide semiconductor (MOS) field-effect transistor with pi-shaped semiconductor conductive layer (SA-piFET) is presented, seeking to improve the performance and upgrade the reliability of the SOI-based devices. Designed to equip with a SA single crystal silicon channel layer, plus a natural source/drain (S/D)...
This work aims to examine and analyze carefully the effects of block oxide length (LBO) in a 40 nm multi-substrate-contact field-effect transistor (MSCFET). In addition, the proposed structure is based on the self-aligned (SA) gate-to-body technique. In the MSCFET design the two key parameters are the length and the height of the block oxide which are so sensitive to the short-channel effects (SCEs)...
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