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Notice of Violation of IEEE Publication Principles??Spur and Noise Reduction Techniques in Ring Oscillator Based Frequency Synthesizers for Broadcast Receiver SoCs??by Maxim, A.in the IEEE Radio and Wireless Symposium, January 2008.After careful and considered review, it has been determined that the above paper is in violation of IEEE's Publication Principles.Specifically, the paper contains references...
Notice of Violation of IEEE Publication Principles??A Single-chip Digitally Enhanced Radio Receiver for DBS Satellite TV Applications??by A. Maxim, R. Poorfard, R. Johnson, P. Crawley, J. Kao, Z. Dong, M. Chennam, D. Trager, M. Reidin the Proceedings of the 2008 IEEE Radio and Wireless Symposium,Page(s):787-790After careful and considered review, it has been determined that the above paper is in violation...
Notice of Violation of IEEE Publication Principles??A BiCMOS SiGe Direct-Conversion DBS Satellite TV Tuner with on-chip ADCs for SiP Integration with a CMOS Demodulator-on-Host??by A. Maxim,in the Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2007. BCTM '07. IEEESept. 30 2007-Oct. 2 2007 Page(s):90-97After careful and considered review, it has been determined that the above paper...
Notice of Violation of IEEE Publication Principles"A -5OdBc Spur 0.13 μm CMOS Ring Oscillator PLL for DBS Satellite Receiver SOCs Using a Multi-Regulator Architecture"by Maxim, A.; Poorfard, R.; Kao, J.;in the Proceedings of the 2007 IEEE Radio and Wireless Symposium,Jan. 2007 Page(s):427-430After careful and considered review, it has been determined that the above paper is in violation...
Notice of Violation of IEEE Publication Principles??A sub-Ips rms jitter 1-5GHz 0.13??m CMOS PLL Using a Passive Feedforward Loop Filter with Noiseless Resistor Multiplication??by Maxim, A.; Gheorghe, M.in the IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2005. Digest of Papers.After careful and considered review, it has been determined that the above paper is in violation of IEEE's Publication...
This paper presents circuit level techniques that reduce both intrinsic and supply or substrate injected noise of charge-pump PLLs operating in the noisy environment of mixed analog-digital ICs. Using a ripple-pole-less sample-reset loop filter provides a staircase shaped oscillator control current that reduces the reference spur, and a nearly 90° phase margin that leads to a negligible jitter peaking...
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