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In this study, we have investigated the multi-level cell (MLC) characteristics and variability analysis of multiple resistance states of one of the most promising and extensively studied binary oxide (HfOx) based nanometer scale RRAM stack by varying the switching current. The device size and thickness of stack layers were confirmed by transmission electron microscope (TEM) images. In the CMOS friendly...
This letter demonstrates a way for modifying the effective work function Phim of a molybdenum (Mo) gate electrode by interface dipole engineering in a metal gate/high-k gate stack. N-type Mo gate Phim (~4.2 eV) was achieved on a HfLaO gate dielectric even after 950-degC rapid thermal annealing (RTA) due to the presence of a La-induced interface dipole layer. By alloying with ~14%-19% of aluminum (Al),...
Nickel fully-silicided (FUSI) gate work function Phin, was successfully tuned for the first time by the insertion of novel yttrium-(Y) based, terbium-(Tb) based, or ytterbium-(Yb) based interlayer at the gate/dielectric interface. Band edge Ni-FUSI gate Phim, (4.01 -4.11 eV) were obtained in a gate-first process flow (950 or 1000degC anneal) by an inserted ultra-thin (~1 nm) interlayer on SiO2 dielectric...
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