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Cloud computing is emerging to host different services on high end compute nodes of Data center with increasing demands of social networking, video streaming, big data processing and other internet applications. With this approach resource sharing is achieved for compute, networking and storage to reduce the OPEX and CAPEX.
With mobile and wireless devices becoming pervasive, low-cost hardwares of security functions are being desired. A compact hardware implementation of the SM3 hash algorithm is presented in this paper. A SRAM is used to do message expansion function instead of shift registers which are used in common hardware implementations, and the values of A~H and V0~V7 registers are updated...
Cryptographic hash functions have many security based applications, particularly in message authentication codes (MACs), digital signatures and data integrity. Secure Hash Algorithm-3 (SHA-3) is a new cryptographic hash algorithm that was selected on 2nd Oct '12 after a five year public contest organized by the National Institute of Standards and Technology (NIST), USA. This paper provides a unique...
The manifestation of radix2 was a highlight in the design of efficient FFT hardware architectures. Afterward, radix2 was extended to R2MDC and R2SDF However, radix2 was only planned for (SDF) single-path delay feedback structures, other than not intended for feed-forward ones, also called (MDC) multi-path delay Commutator. In this paper, the design of R2MDC (Radix2 Multipath Delay Commutator and R2SDF...
It has become very common to read in the media about missing person viz., young kids, mentally challenged kids, and senior citizens. Presently through newspaper, TV, and police as well, attempts are being made to identify these missing persons. In this paper we present the hardware and test results of missing person identification system based on RFID technology, Arduino embedded system and Arduino...
Video encoding algorithms with less complexity are required in many real time video coding applications. Motion Estimation (ME) is computationally intensive part of video compression. This paper introduces One bit transformation ME algorithm, which transforms the video sequences from multi-bit to a single bit per pixel representation and then used conventional motion estimation search strategies,...
Temperature is one of the important parameters related to a material as such or placed in a furnace. If the sample is located at a distant place, then temperature has to be logged by a system such as laptop/desktop. Further, accurate measurement and monitoring of temperature is an important task in research field and vital task in industrial and chemical processes. In this paper, we present an inexpensive...
This paper presents a decimal adder which is hardware, speed and power efficient. Conventional BCD addition usually concludes by adding the correction bits to the result, which often proves to consume lot of processing latency, hence instead of adding correction bits appropriate flag bits are generated thus reducing the delay and the hardware encountered decimal correction. Various fast adders like...
In this paper, we present a bunch of experiments useful for an embedded system laboratory. It is an outcome of the author's experience in teaching computer architecture and embedded systems in theory. The experiments described herein can be implemented as one third semester laboratory course. Further, they are built around ARM based RISC processor architecture, which supports modular programming....
Integrated circuits fabricated in deep sub-micron technology are vulnerable to intermittent or transient faults which are the predominant cause of system failures. With continued scaling, operating voltage levels have reduced and resultant decrease in noise margins, the possibility of transient faults is likely to increase. Also, during operation in adverse environments, transient faults occur upon...
Seamless Rate Adaptation(SRA) based on rate compatible modulation(RCM) is a new receiver rate adaptive method, in which a block of bits are mapped into a series of symbols by a sparse matrix for high order modulation. According to channel state, the receiver select of the proper number of symbols to iterative demodulation by RCM. This system can achieves smooth rate adjustment under highly dynamic...
In this paper, we present a bunch of experiments useful for an embedded system laboratory. It is an outcome of the author's experience in teaching computer architecture and embedded systems in theory. The experiments described herein can be implemented as one third semester laboratory course. Further, they are built around the Texas Instrument's low-power RISC microcontroller MSP430F149, which supports...
We present a virtualized setup of a Hadoop cluster that provides greater computing capacity with lesser resources, since a virtualized cluster requires fewer physical machines. The master node of the cluster is set up on a physical machine, and slave nodes are set up on virtual machines (VMs) that may be on a common physical machine. Hadoop configured VM images are created by cloning of VMs, which...
We have implemented a Hadoop compatible framework that helps in detection of suspected hardware failures in DataNodes within a Hadoop cluster and in signalling the nodes accordingly. Based on the status of the various hardware components of the DataNodes, the master node signals the DataNode so that appropriate actions can be taken. In a Hadoop cluster, the knowledge of the network is important for...
This paper presents a hardware-software co-design implementation of feature extraction circuit which can be used for speech recognition applications. Mel-frequency cepstral co-efficients are used to represent the features of the speech. A comparison between a complete software implementation and a co-design with both hardware and software components is brought out for the same circuit. The advantage...
The mapping of many short sequences of DNA, called reads, to a long reference genome is an common task in molecular biology. The task amounts to a simple string search, allowing for a few mismatches due to mutations and inexact read quality. While existing solutions attempt to align a high percentage of the reads using small memory footprints, Shepard is concerned with only exact matches and speed...
Programmable embedded systems which are configured through a cable for operation, typically are inaccessible for reprogramming after deployment. Cheaper systems tend to be deployed in large numbers like Wireless Sensor Network (WSN) nodes forming a mesh network. In such cases, a reconfiguration or upgrade of firmware is difficult. A wireless channel for programming with broadcasting features addresses...
Even though the adoption of cloud computing and virtualization have improved resource utilization to a great extent, the continued traditional approach of resource allocation in production environments has introduced the problem of over-provisioning of resources for enterprise-class applications hosted in cloud systems. In this paper, we address the problem and propose ways to minimize over-provisioning...
This paper presents a low-power, time-based, compressive sampling architecture for analog-to-digital conversion. A random pulse-position-modulation (PPM) analog-to-digital conversion (ADC) architecture is proposed. A prototype 9-bit random PPM ADC incorporating a pseudo-random sampling scheme is implemented as proof of concept. This approach leverages the energy efficiency of time-based processing...
This paper presents a hardware implementation method for the SubBytes and InvSubBytes transformations of the AES in view of foregoing look-up tables (LUT) having unbreakable delay. In addition, the transformations would be exceeding complex in hardware if affine transformation in Galois Field GF(28) is employed. It will lead to slow computing speed and high cost of source. Hence decomposing method...
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