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Wafer Level Packaging (WLP) has started to shine and played a prominent role in recent years in both semiconductor and Integrated Circuit (IC) field, especially in now thriving Micro-Electro-Mechanical System (MEMS) applications on account of its distinctive operating mechanism and adaptive design variety. In this study, several crucial WLP technologies are disclosed in detail, including Wafer to...
Wafer Level Packaging (WLP) has started to thrive in recent years in IC packaging domain, especially in Micro-Electro-Mechanical Systems (MEMS) field due to its unique operating characteristic and design diversity. In this paper, several significant WLP technologies, including wafer to wafer (W2W) bonding, wafer level wire bonding, wafer level compound molding, and compound lapping, are disclosed...
A novel thin-film poly-Si fabrication process has been demonstrated. This low thermal budget process transforms the multilayer amorphous silicon thin film stack into a poly-Si stack in one simple step over a very short period of time without deteriorating the underneath glass substrate. The experimental result of the unique vertical crystallization process including the mechanism is discussed. Influences...
One approach to improve device stability is using polymer/ZnO nanorod hybrid solar cell. In our solar cell, the interface of ITO/PEDOT:PSS can be avoided by employing ZnO nanorod using a hydrothermal method and the low-work-function metal Al can be replaced by Ag. ZnO nanorod is used as an excellent electron selective layer and Ag has the nature of less air sensitivity.
The inverted bulk hetero-junction solar cell on the polyester (PET) substrate with a non-annealing active layer is investigated. Our investigations show that the easily processed inverted device with a non-annealing active layer on the indium-tin-oxide coated PET substrate exhibits a high power conversion efficiency of ~3.65%.
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