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The Optical Network-on-Chip (ONoC) is considered as a promising way to achieve high performance of multiprocessor systems, and it will be a 3-Dimensional (3D) architecture organized by a certain topology where optical routers are optically interconnected with each other. For the design of 3D ONoCs, the highly reliable IP-core mapping is a key problem of properly assigning IP cores onto optical routers...
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