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A novel damage recovery scheme using the oxygen showering post-treatment (OSP) is proposed to recover patterning damages and to improve electric and magnetic properties of p-MTJs, and its array yield. By applying our OSP to 25nm p-MTJs cell array, the MR was increased from 99% to 116% and the Isw was decreased from 41.1uA to 28.7uA. Moreover, electric short fails of MTJs array due to metallic by-products...
We investigate the sub-20nm level scalability of STT-MRAM cells possessing perpendicular magnetization induced from the interface of free layer (FL) and MgO tunnel barrier. We demonstrate that the MTJs utilizing dual interfaces of FL and MgO exhibit enhanced scalability with high thermal stability and low switching current, compared with the MTJs with a single interface. As thermal stability factor...
28nm MTJ for 8∼16Gb MRAM device has been successfully integrated with special patterning & etch technique. Resistance (R) separation between high and low R states was 15.2σ, comparable to that for 80nm MTJ cells. Thermal stability factor (Δ) followed prediction fairly well, and MTJ with free layer (FL) of 25Å and aspect ratio (AR) of 3 showed Δ of 56. In order to realize sub-30nm MRAM device,...
Feasibility of STT-MRAM (Spin-Transfer Torque Magnetic Random Access Memory) as next generation non-volatile memory has been tested for the replacement of DRAM and NOR Flash. For competition with DRAM, STT-MRAM unit cell size should be reduced to 6 ~ 8F2 and switching current density is required to be less than 1 MA/cm2. Here, we report that the cell characteristics of on-axis STT-MRAM with 6 ~ 8F...
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