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This paper presents a low-phase-error wideband fractional-N frequency synthesizer. Differential tuning is described and a level shift circuit is proposed to obtain symmetrical tuning range. On-chip LDO regulator is designed to improve the power supply rejection for VCO. A voltage monitor is used to enhance the digital AFC technique to overcome the temperature variation. The synthesizer was implemented...
This paper presents a wideband fractional-N synthesizer whose loop bandwidth is controlled adaptively. A fast automatic frequency-control (AFC) technique which selects the subband of the VCO is proposed to reduce the residual fractional error to 1/16 of the reference frequency fref. A new 4/4.5 prescaler is adopted to lower the quantization noise by reducing the quantization step size to 0.5.
A fully integrated 1.175 to 2 GHz differentially tuned frequency synthesizer aimed for DVB-T tuners is implemented in 0.18-mum CMOS. Techniques are proposed to make the loop bandwidth constant across the whole output frequency range to maintain phase noise optimization and loop stability. It exhibits in-band phase noise of -97.6 dBc/Hz at 10 kHz offset and integrated phase error of 0.63deg from 100...
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