The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
High-voltage (HV) devices such as Double Diffused Drain MOS (DDDMOS) transistors are integrated with submicron CMOS integrated circuit in power management ICs. Recently, hot-carrier reliability of HV MOS transistors has attracted wide attention. This paper presents the effect of n-type double diffusion (NDD) implant dosages on hot-carrier reliability of DDDMOS transistors.
In this letter, on-resistance RON degradation in lateral double-diffused MOS transistors is observed when the device is operated under off-state avalanche-breakdown condition. Although interface states and positive oxide-trapped charges are created near the drain, interface-state generation is identified to be the main degradation mechanism. Technology computer-aided design simulation suggests that...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.