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A novel SOI LDMOS with Double Trench Gate (DTG) is proposed. The DTG SOI LDMOS is obtained by introducing an additional trench gate between P-well region and N-drift region, which can form one more n-channel in on-state. The parameters of DTG SOI LDMOS were optimized to some extend through 2D device simulations and some main electronic properties were obtained through 2D device simulation with Silvaco...
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