The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A compact resistive-feedback CMOS low-noise amplifiers (LNA) is presented for wideband applications. The LNA is based on a common source (CS) amplifier with gate inductive peaking, resistive feedback, and source degeneration inductive topologies to achieve the wideband matching networks The LNA is fabricated in a standard 0.18-μm RF CMOS technology. Under power consumption of 10.87 mW with 1.5-V power...
CCN is one of the future Internet architecture. However, the lack of real traffic becomes an obstacle to advanced CCN researches. HTTP, as an content-oriented application-layer protocol working over current Internet, is similar to CCN in many aspects. In this demo, we try to convert HTTP traffic into CCN traffic with HTTP-CCN gateway. Although HTTP is not equivalent to CCN, we can design carefully...
This paper present a circuit design of a 8-bit parity code generator using single-electron transistors (SETs). The design is based on the characteristic of multigate single-electron transistor and a single-electron transistor can realize a n-input exclusive-OR (XOR) gate or XNOR gate. The proposed design enable us to construct a 8-bit parity code generator using only four SETs. The simulation is performed...
Based on both the I-V characteristics of single-electron transistors and the MOS digital integrated circuit design concept, a good combination of single-electron transistors with MOS transistors is advanced to create a novel inverter, which, compared with the pure SET circuit, is considerably augmented in its voltage gain and drive capability. Then a close analysis was conducted of the inverter, on...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.