The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, we present two implementations of a closed-loop process compensation scheme for high speed ring oscillators-the comparator based and the switched capacitor based loops. We provide detailed discussion of the frequency accuracy, loop stability, and implementation cost for each design. More than 150 test chips from multiple wafer-runs in a 90 nm CMOS process verify that frequency accuracy...
A 3-stage current-starved ring oscillator with 65.1% reduction in process variation in a 90 nm CMOS process is presented. The low variation is achieved without degrading the mean operating frequency through the implementation of an addition-based current source to replace a single transistor current source in each inverter stage. No post-fabrication trimming or calibration is required. Circuit simulations...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.