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Two novel architectures for designing modulo 2n-1 squarers are given. The first one does not perform any encoding on the input operand, while the second one uses Booth-encoding. Pre-layout estimates indicate that both architectures result in area and/or delay efficient modulo 2n-1 squarers. The non-encoded modulo squarers are more suitable for small values of n while the Booth-encoded modulo squarers...
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