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This paper introduces a CMOS vision sensor chip in a standard $0.18~\mu \text{m}$ CMOS technology for Gaussian pyramid extraction. The Gaussian pyramid provides computer vision algorithms with scale invariance, which permits having the same response regardless of the distance of the scene to the camera. The chip comprises $176 \times 120$ photosensors arranged into $88 \times 60$ processing...
This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. We describe a realization for the standard CMOS base process of a commercial 3-D TSV stack featuring a power consumption of only 20pW per elementary cell at 30fps. The proposed block...
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