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Charge trapping and wearout characteristics of self-aligned enhancement-mode GaAs nMOSFETs with silicon interface passivation layer and HfO2 gate oxide are systematically investigated at various time scales (from micro-seconds to seconds). Unlike high-kappa on silicon devices, both bulk trapping and interface trapping affect the PBTI (positive bias temperature instability) characteristics of nMOSFETs...
Fluorine passivation in poly-Si/TaN/HfO2/p-Si and poly-Si/TaN/HfSiON/HfO2/p-Si gate stacks with varying TaN thickness through gate ion implantation has been studied. It has been found that when TaN thickness was less than 15 nm, mobility and subthreshold swing improved significantly in HfO2 nMOSFETs; while there was little performance improvement in HfSiON/HfO2 nMOSFETs due to the blocking of F atoms...
To overcome the issues of mobility degradation and charge trapping in the high-k MOSFET, a stacked Y2O3 (top)/HfO2 (bottom) multi-metal gate dielectric with TaN gate has been developed. Compared to the HfO2 reference, the new dielectric shows similar scalability, but superior device performance and reliability characteristics. Channel mobility, fast transient charge trapping, bias temperature instability,...
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