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This paper introduces an architecture and design for high resolution, high linearity Nyquist rate SAR ADCs requiring only a single simple calibration at startup. The proposed architecture benefits from an intrinsically linear 1.5 bit ΣΔ DAC to resolve the fine bits of the SAR ADC after a coarse conversion phase with a monotonically switched capacitive DAC. The ΣΔ DAC is also used for a single shot...
This paper considers the implementation of a continuous-time low-pass single-bit ΔΣ analog-digital converter (ADC) for radar applications. By taking advantage of the high transit frequency of a 0.25μm SiGe BiCMOS technology, the 3rd-order modulator operates at 1.92GHz and achieves 77.8dB SNDR within a bandwidth of 15MHz, when simulating the sensitive circuit parts on transistor level. Thanks to the...
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