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In this paper, we first propose a static analysis approach to estimate the maximum value of the worst-case latency of all possible communications in a Chip Multi-Processor (CMP) with a 2D-Mesh Network-on-Chip (NoC), which is called the Worst-case Inter-core Communication Latency (WICL). Then the Hop-based Priority scheduling approach is proposed for a 2D-Mesh NoC to improve its WICL. Our experimental...
To improve the survivability of distributed storage systems, using the theory of similarity transformation of Jordan standard shape in theory of matrix, combining the method of Lagrange interpolation method, we design a safe and high-efficient data distributing algorithm with (r,n) threshold scheme. This algorithm has higher efficiency, stronger security and survivability than reference. It has important...
In this paper, a novel ZCZVS asymmetrical dual switch forward converter with a ZCS cell is proposed. The proposed active clamp circuit helps primary switches to realize zero-voltage switching and to expend the duty cycle, while the proposed ZCS cell helps to realize zero-current switching on primary switches and the rectifier diode. All the primary semiconductor devices turn on and off under soft...
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